lec1-10 opamp
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Electrical engineering Operational Amplifier > Lecture 1 > Lecture 2 > Lecture 3 > Lecture 4 > Lecture 5 > Lecture 6 > Lecture 7 > Lecture 8 > Lecture 9 >Lecture 10 OPAMP Apllications >Lecture 11 > Lecture 12 > Lecture 13 > Lecture 14 > Lecture 15 > Lecture 16 > Lecture 17 > Lecture 18 > Lecture 19 > Lecture 20 Oscillator > Lecture 21 > Lecture 22 > Lecture 23 > Lecture 24 > Lecture 25 > Lecture 26 Voltage Regulator > Lecture 27 > Lecture 28 > Lecture 29 > Lecture 30 Analog Circuits Prof.Pramod Agarwal Lect ure - 4: Biasing of Differential Amplifiers Constant Current Bias: In the dc analysis of differential amplifier, we have seen that the emitter current I E depends upon the value of β dc . To make operating point stable I E current should be constant irrespective value of β dc . For constant I E , R E should be very large. This also increases the value of CMRR but if R E value is increased to very large value, I E (quiescent operating current) decreases. To maintain same value of I E , the emitter supply V EE must be increased. To get very high value of resistance R E and constant I E , current, current bias is used. Figure 5.1 file:///C|/ Users/Public/Do cuments/ANAL OG%20INTEGRATED%20 CIRCUITS/l ec4a.htm (1 of 4) [12/5/2010 1:54:29 AM]
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Transcript of lec1-10 opamp
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
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OPAMP Apllications
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Oscillator gt Lec ture 21
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 582
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
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gtLec ture 10
OPAMP Apllications
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Oscillator gt Lec ture 21
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
882019 lec1-10 opamp
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 782
Electrical engineering
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 882
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
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gtLec ture 10
OPAMP Apllications
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Oscillator gt Lec ture 21
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Voltage Regulator
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (1 of 3) [1252010 21143 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 982
Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
882019 lec1-10 opamp
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
El i l i i
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1182
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 17
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gt Lec ture 20
Oscillator
gt Lec ture 21
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gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
El t i l i i
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1282
Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electricalengineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1382
Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electricalengineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1482
Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
Electricalengineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1582
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
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gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electricalengineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1682
Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1782
g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1882
g g
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
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gt Lec ture 16
gt Lec ture 17
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gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (1 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1982
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2282
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2382
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2482
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2682
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2782
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
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gt Lec ture 16
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator gt Lec ture 21
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
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Electrical engineering
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
El i l i i
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 17
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
El t i l i i
882019 lec1-10 opamp
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electricalengineering
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electricalengineering
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
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Electricalengineering
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 17
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gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
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gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electricalengineering
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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g g
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 17
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gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
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gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
882019 lec1-10 opamp
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2482
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2682
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2782
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
882019 lec1-10 opamp
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 382
Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 582
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator gt Lec ture 21
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Voltage Regulator
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gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
882019 lec1-10 opamp
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Electrical engineering
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 882
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
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Oscillator gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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882019 lec1-10 opamp
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Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
El i l i i
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
gt Lec ture 15
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gt Lec ture 17
gt Lec ture 18
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gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
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Voltage Regulator
gt Lec ture 27
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
El t i l i i
882019 lec1-10 opamp
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electricalengineering
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electricalengineering
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
Electricalengineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1582
Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electricalengineering
882019 lec1-10 opamp
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1782
g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1882
g g
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 17
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gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (1 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1982
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2482
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2682
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2782
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (1 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
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gt Lec ture 4
gt Lec ture 5
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OPAMP Apllications
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Oscillator gt Lec ture 21
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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El i l i i
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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El t i l i i
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electricalengineering
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Electrical engineering
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Electricalengineering
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
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gtLec ture 10
OPAMP Apllications
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electricalengineering
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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g g
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
gt Lec ture 21
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gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
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gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Electrical engineering
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
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Oscillator
gt Lec ture 21
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gt Lec ture 23
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gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electrical engineering
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 15
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gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
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gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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El i l i i
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electricalengineering
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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Electrical engineering
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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Electrical engineering
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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Electrical engineering
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
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httpslidepdfcomreaderfulllec1-10-opamp 1982
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Electrical engineering
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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Electrical engineering
L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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Electrical engineering
collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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httpslidepdfcomreaderfulllec1-10-opamp 3782
i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
For satisfactory operation two identical transistors are necessary
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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El i l i i
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Electrical engineering
Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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El t i l i i
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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httpslidepdfcomreaderfulllec1-10-opamp 882
Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Example - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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El i l i i
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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El t i l i i
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
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Electrical engineering
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
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gtLec ture 10
OPAMP Apllications
gtLec ture 11
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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Electrical engineering
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
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882019 lec1-10 opamp
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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El i l i i
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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El t i l i i
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electricalengineering
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (3 of 4) [1252010 15429 AM]
Electricalengineering
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Electrical engineering
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (4 of 4) [1252010 15429 AM]
Electricalengineering
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electricalengineering
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (3 of 3) [1252010 21357 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 1882
g g
Operational Amplifier
gt Lec ture 1 gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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Oscillator
gt Lec ture 21
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Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (1 of 3) [1252010 21143 AM]
Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (3 of 3) [1252010 21143 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 2182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
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gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (1 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4ahtm (2 of 4) [1252010 15429 AM]
Electrical engineering
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Electrical engineering
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
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gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
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gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (1 of 3) [1252010 21357 AM]
Electrical engineering
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
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gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
gt Lec ture 1
gt Lec ture 2
gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11 gt Lec ture 12
gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21
gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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Electrical engineering
L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Electrical engineering
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Operational Amplifier
gt Lec ture 1
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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Electrical engineering
collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Electrical engineering
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Operational Amplifier
gt Lec ture 1
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OPAMP Apllications
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Oscillator
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Constant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides avery high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for V D In this case the commonmode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Electrical engineering
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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Electrical engineering
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
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Electrical engineering
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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Electrical engineering
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Electrical engineering
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Electrical engineering
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Electrical engineering
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4bhtm (2 of 3) [1252010 21357 AM]
Electrical engineering
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httpslidepdfcomreaderfulllec1-10-opamp 2782
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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Electrical engineering
collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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httpslidepdfcomreaderfulllec1-10-opamp 3782
i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
gt Lec ture 1
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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g g
For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
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g g
For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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g g
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec4chtm (2 of 3) [1252010 21143 AM]
Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2 = 68 Ω The designed component values are
RE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Electrical engineering
P ti ll t k R 3 6 kΩ
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3082
Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersConstant Current Bias
In the dc analysis of differential amplifier we have seen that the emitter current I E
depends upon the value of βdc To make operating point stable IE current should be
constant irrespective value of βdc
For constant IE RE should be very large This also increases the value of CMRR but if
RE value is increased to very large value IE (quiescent operating current) decreases
To maintain same value of IE the emitter supply VEE must be increased To get very
high value of resistance RE and constant IE current current bias is used
Figure 51
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 1 shows the dual input balanced output differential amplifier using a constant
current bias The resistance RE is replace by constant current transistor Q3 The dc
collector current in Q3 is established by R1 R2 amp RE
Applying the voltage divider rule the voltage at the base of Q 3 is
Because the two halves of the differential amplifiers are symmetrical each has half of
the current IC3
The collector current IC3 in transistor Q3 is fixed because no signal is injected into either
the emitter or the base of Q3
Besides supplying constant emitter current the constant current bias also provides a
very high source resistance since the ac equivalent or the dc source is ideally an opencircuit Therefore all the performance equations obtained for differential amplifierusing emitter bias are also valid
As seen in IE expressions the current depends upon VBE3 If temperature changes
VBE changes and current IE also changes To improve thermal stability a diode is placed
in series with resistance R1as shown in f ig 2
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Fig 2
This helps to hold the current IE3 constant even though the temperature changes
Applying KVL to the base circuit of Q3
Therefore the current IE3 is constant and independent of temperature because of the
added diode D Without D the current would vary with temperature because VBE3
decreases approximately by 2mVdegC The diode has same temperature dependenceand hence the two variations cancel each other and I E3 does not vary appreciably
with temperature Since the cut ndash in voltage VD of diode approximately the same value as
the base to emitter voltage VBE3 of a transistor the above condition cannot be satisfied
with one diode Hence two diodes are used in series for VD
In this case the common
mode gain reduces to zero
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iers
Some times zener diode may be used in place of diodes and resistance as shown in f ig
3 Zeners are available over a wide range of voltages and can have matching temperature
coefficient
The voltage at the base of transistor QB is
Fig 3
The value of R2 is selected so that I2 asymp 12 IZ(min) where IZ is the minimum current required
to cause the zener diode to conduct in the reverse region that is to block the ratedvoltage VZ
Current Mirror
The circuit in which the output current is forced to equal the input current is said to bea current mirror circuit Thus in a current mirror circuit the output current is a mirror imageof the input current The current mirror circuit is shown in f ig 4
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 4
Once the current I2 is set up the current IC3 is automatically established to be nearly equal
to I2 The current mirror is a special case of constant current bias and the current mirror
bias requires of constant current bias and therefore can be used to set up currentsin differential amplifier stages The current mirror bias requires fewer components
than constant current bias circuits
Since Q3 and Q4 are identical transistors the current and voltage are approximately same
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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For satisfactory operation two identical transistors are necessary
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 4 B ias ing of D i f ferent ia l Ampl i f iersExample - 1
Design a zener constant current bias circuit as shown
in f ig 5 according to the following specifications
(a) Emitter current -IE = 5 mA
(b) Zener diode with Vz = 47 V and Iz = 53 mA
(c) βac = βdc = 100 VBE = 0715V
(d) Supply voltage - VEE = - 9 V
Solut ion
From f ig 6 using KVL we get
Fig 5
Practically we use RE = 820 kΩ
Practically we use R2
= 68 Ω
The designed component values areRE = 860 Ω
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Electrical engineering
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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R2 = 68 Ω Fig 6
Example - 2
Design the dual-input balanced output differential amplifier using the diode constantcurrent bias to meet the following specifications
1 supply voltage = plusmn 12 V
2 Emitter current IE in each differential amplifier transistor = 15 mA
3 Voltage gain le 60
Solut ion
The voltage at the base of transistor Q3 is
Assuming that the transistor Q3 has the same characteristics
as diode D1 and D2 that is VD = VBE3 then
Practically we take RE = 240 Ω
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P ti ll t k R 3 6 kΩ
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Practically we take R2 = 36 kΩ
To obtain the differential gain of 60 the required value of thecollector resistor is
The following f ig 7 shows the dual input balanced output
differential amplifier with the designed component values asRC = 1K RE = 240 Ω and R2 = 36KΩ
Fig 7
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersThe operation amplifier
An operational amplifier is a direct coupled high gain amplifier consisting of one ormore differential (OPAMP) amplifiers and followed by a level translator and an outputstage An operational amplifier is available as a single integrated circuit package
The block diagram of OPAMP is shown in f ig 1
Fig 1
The input stage is a dual input balanced output differential amplifier This stage providesmost of the voltage gain of the amplifier and also establishes the input resistance ofthe OPAMPThe intermediate stage of OPAMP is another differential amplifier which isdriven by the output of the first stage This is usually dual input unbalanced output
Because direct coupling is used the dc voltage level at the output of intermediate stageis well above ground potential Therefore level shifting circuit is used to shift the dc levelat the output downward to zero with respect to ground The output stage is generally apush pull complementary amplifier The output stage increases the output voltage swingand raises the current supplying capability of the OPAMP It also provides lowoutput resistance
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L l T l t
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Level Translator
Because of the direct coupling the dc level at the emitterrises from stages to stage This increase in dc level tendsto shift the operating point of the succeeding stages andtherefore limits the output voltage swing and may evendistort the output signal
To shift the output dc level to zero level translator circuitsare used An emitter follower with voltage divider is the
simplest form of level translator as shown in f ig 2
Thus a dc voltage at the base of Q produces 0V dc at theoutput It is decided by R1 and R2 Instead of voltage
divider emitter follower either with diode current bias orcurrent mirror bias as shown in f ig 3 may be used to get
better results
In this case level shifter which is common collectoramplifier shifts the level by 07V If this shift is notsufficient the output may be taken at the junction of tworesistors in the emitter leg
Fig 2
Fig 3
Fig 4 shows a complete OPAMP circuit having input different amplifiers with
balanced output intermediate stage with unbalanced output level shifter and anoutput amplifier
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Fig 4
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Fig 4
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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Electrical engineering
and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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Electrical engineering
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-1
For the cascaded differential amplifier shown in f ig 5 determine
The collector current and collector to emitter voltage for each transistor The overall voltage gain The input resistance The output resistance
Assume that for the transistors used hFE = 100 and VBE = 0715V
Fig 5
Solut ion
(a) To determine the collector current and collector to emitter voltage of transistors Q 1
and Q2 we assume that the inverting and non-inverting inputs are grounded The
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collector currents (IC asymp IE) in Q1 and Q2 are obtained as below
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
882019 lec1-10 opamp
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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collector currents (IC IE) in Q1 and Q2 are obtained as below
That is IC1 = IC2 =0988 mA
Now we can calculate the voltage between collector and emitter for Q 1 and Q2 using
the collector current as follows
VC1 = VCC = -RC1 IC1 = 10 ndash (22kΩ) (0988 mA) = 783 V = VC2
Since the voltage at the emitter of Q1 and Q2 is -0715 V
VCE1 = VCE2 = VC1 -VE1 = 783 + 0715 = 8545 V
Next we will determine the collector current in Q3 and Q4 by writing the Kirchhoffs
voltage equation for the base emitter loop of the transistor Q 3
VCC ndash RC2 IC2 = VBE3 - RE IC3 - RE2 (2 IE3) + VBE= 0
10 ndash (22kΩ) (0988mA) - 0715 - (100) (IE3) ndash (30kΩ) IE3 + 10=0
10 - 217 - 0715 + 10 - (301kΩ) IE3 = 0
Hence the voltage at the collector of Q3 and Q4 is
VC3 = VC4= VCC ndash RC3 IC3 = 10 ndash (12kΩ) (0569 mA)
= 932 V
Therefore
VCE3 = VVCE4 = VC3 ndash VE3 = 932 ndash 712 = 22 V
Thus for Q1 and Q2
ICQ = 0988 mAVCEQ = 8545 V
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and for Q3 and Q4
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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and for Q3 and Q4
ICQ = 0569 mA
VCEQ = 22 V
[Note that the output terminal (VC4) is at 932 V and not at zero volts]
(b) First we calculate the ac emitter resistance re of each stage and then its voltage gain
The first stage is a dual input balanced output differential amplifier therefore its voltagegain is
Where
Ri2 = input resistance of the second stage
The second stage is dual input unbalanced output differential amplifier withswamping resistor RE the voltage gain of which is
Hence the overall voltage gain is
Ad= (Ad1) (Ad2) = (8078) (417) = 33685
Thus we can obtain a higher voltage gain by cascading differential amplifier stages
(c)The input resistance of the cascaded differential amplifier is the same as theinput resistance of the first stage that is
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Ri = 2βac(re1) = (200) (253) = 506 kΩ
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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i βac( e1) ( ) ( )
(d) The output resistance of the cascaded differential amplifier is the same as theoutput resistance of the last stage Hence
RO = RC = 12 kΩ
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 3882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 5 The Operat ional Ampl i f iersExample-2
For the circuit show in f ig 6 it is given that β =100 VBE =0715V Determine
The dc conditions for each state The overall voltage gain The maximum peak to peak output voltage swing
Fig 6
Solut ion
(a) The base currents of transistors are neglected and VBE drops of all transistors
are assumed same
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec5chtm (3 of 3) [1252010 21359 AM]
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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GOTO 1 || 2 || 3 || H
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Electrical engineering
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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From the dc equivalent circuit
and
b) The overall voltage gain of the amplifier can be obtained as below
Therefore voltage gain of second stage
The input impedance of second stage is
The effective load resistance for first stage is
Therefore the voltage gain of first stage is
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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The overall voltge gain is AV = AV1 AV2
(c) The maximum peak to peak output votage swing = Vopp = 2 (V C7 - VE7)
= 2 x (552 - 3325)= 439 V
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier The symbolic diagram of an OPAMP is shown in f ig 1
741c is most commonly used OPAMP available in IC package It is an 8-pin DIP chip
Parameters of OPAMP
The various important parameters of OPAMP are follows
1 Input Of fset Vol tage
Input offset voltage is defined as the voltage thatmust be applied between the two input terminals of
an OPAMP to null or zero the output f ig 2 shows
that two dc voltages are applied to input terminals tomake the output zero
Vio = Vdc1 ndash Vdc2
Vdc1 and Vdc2 are dc voltages and RS represents the
source resistance Vio is the difference of Vdc1 and
Vdc2 It may be positive or negative For a 741C
OPAMP the maximum value of Vio is 6mV It means
a voltage plusmn 6 mV is required to one of the input toreduce the output offset voltage to zero The smaller
the input offset voltage the better the differentialamplifier because its transistors are more closelymatched
Fig 2
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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2 Input o f fset Cur rent
The input offset current Iio is the difference between the currents into inverting and
non-inverting terminals of a balanced amplifier
Iio = | IB1 ndash IB2 |
The Iio for the 741C is 200nA maximum As the matching between two input terminalsis improved the difference between IB1 and IB2 becomes smaller ie the I io value
decreases furtherFor a precision OPAMP 741C Iio is 6 nA
3 Input B ias Cur rent
The input bias current IB is the average of the current entering the input terminals of
a balanced amplifier ie
IB = (IB1 + IB2 ) 2
For 741C IB(max) = 700 nA and for precision 741C IB = plusmn 7 nA
4 Dif ferent ial Input Resis tance (R i)
Ri is the equivalent resistance that can be measured at either the inverting or non-
inverting input terminal with the other terminal grounded For the 741C the input resistanceis relatively high 2 MΩ For some OPAMP it may be up to 1000 G ohm
5 Input Capacitance (C i)
Ci is the equivalent capacitance that can be measured at either the inverting and
noninverting terminal with the other terminal connected to ground A typical value of C i is
14 pf for the 741C
6 Of fset Vol t age Adjus tment Range
741 OPAMP have offset voltage null capability Pins 1 and 5 are marked offset null forthis purpose It can be done by connecting 10 K ohm pot between 1 and 5 as shown in
f ig 3
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 3
By varying the potentiometer output offset voltage (with inputs grounded) can be reducedto zero volts Thus the offset voltage adjustment range is the range through which theinput offset voltage can be adjusted by varying 10 K pot For the 741C the offsetvoltage adjustment range is plusmn 15 mV
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
7 Input Voltage Range
Input voltage range is the range of a common mode input signal for which adifferential amplifier remains linear It is used to determine the degree of matchingbetween the inverting and noninverting input terminals For the 741C the range of theinput common mode voltage is plusmn 13V maximum This means that the common modevoltage applied at both input terminals can be as high as +13V or as low as ndash13V
8 Common Mode Reject io n Ratio (CMRR)
CMRR is defined as the ratio of the differential voltage gain A d to the common mode
voltage gain ACM
CMRR = Ad ACM
For the 741C CMRR is 90 dB typically The higher the value of CMRR the better isthe matching between two input terminals and the smaller is the output commonmode voltage
9 Supply voltage Reject io n Ratio (SVRR)
SVRR is the ratio of the change in the input offset voltage to the corresponding change
in power supply voltages This is expressed in micro V V or in decibels SVRR can be defined as
SVRR = ∆ Vio ∆ V
Where ∆ V is the change in the input supply voltage and ∆ Vio is the corresponding change
in the offset voltage
For the 741C SVRR = 150 micro V V
For 741C SVRR is measured for both supply magnitudes increasing or
decreasing simultaneously with R3 le 10K For same OPAMPS SVRR is separately
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specified as positive SVRR and negative SVRR
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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10 Large Signal Voltage Gain
Since the OPAMP amplifies difference voltage between two input terminals the voltagegain of the amplifier is defined as
Because output signal amplitude is much large than the input signal the voltage gainis commonly called large signal voltage gain For 741C is voltage gain is 200000 typically
11 Output vo l tage Swing
The ac output compliance PP is the maximum unclipped peak to peak output voltage thatan OPAMP can produce Since the quiescent output is ideally zero the ac output voltagecan swing positive or negative This also indicates the values of positive andnegative saturation voltages of the OPAMP The output voltage never exceeds these limitsfor a given supply voltages +V
CCand ndashV
EE For a 741C it is plusmn 13 V
12 Output Resis tance (RO)
RO is the equivalent resistance that can be measured between the output terminal of
the OPAMP and the ground It is 75 ohm for the 741C OPAMP
Example - 1
Determine the output voltage in each of the following cases for the open loopdifferential amplifier of f ig 4
a vin 1 = 5 m V dc vin 2 = -7 microVdc
b vin 1 = 10 mV rms vin 2= 20 mV rms
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Electrical engineering
GOTO 1 || 2 || 3 || H
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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Electrical engineering
operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 4
Specifications of the OPAMP are given belowA = 200000 Ri = 2 M Ω R O = 75Ω + VCC = + 15 V - VEE = - 15 V and output
voltage swing = plusmn 14V
Solut ion
(a) The output voltage of an OPAMP is given by
Remember that vo = 24 V dc with the assumption that the dc output voltage is zero when
the input signals are zero
(b) The output voltage equation is valid for both ac and dc input signals The outputvoltage is given by
Thus the theoretical value of output voltage vo = -2000 V rms However the
OPAMP saturates at plusmn 14 V Therefore the actual output waveform will be clipped asshown f ig 5 This non-sinusoidal waveform is unacceptable in amplifier applications
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 5
13 Output Shor t c i rcu i t Cur rent
In some applications an OPAMP may drive a load resistance that is approximatelyzero Even its output impedance is 75 ohm but cannot supply large currents Since OPAMPis low power device and so its output current is limited The 741C can supply amaximum short circuit output current of only 25mA
14 Supply Current
IS is the current drawn by the OPAMP from the supply For the 741C OPAMP the
supply current is 28 m A
15 Power Consumpt ion
Power consumption (PC) is the amount of quiescent power (vin= 0V) that must be
consumed by the OPAMP in order to operate properly The amount of power consumedby the 741C is 85 m W
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 4882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 6 Prac t ica l Operat ional Ampl i f ier Parameters of OPAMP
16 Gain Bandwidt h Produc t
The gain bandwidth product is the bandwidth of the OPAMP when the open loop voltage
gain is reduced to 1 From open loop gain vs frequency graph At 1 MHz shown in f ig 6
It can be found 1 MHz for the 741C OPAMP frequency the gain reduces to 1 The midband voltage gain is 100 000 and cut off frequency is 10Hz
Fig 6
17 Slew Rate
Slew rate is defined as the maximum rate of change of output voltage per unit of time
under large signal conditions and is expressed in volts micro secs
To understand this consider a charging current of a capacitor shown in f ig 7
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Electrical engineering
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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Electrical engineering
V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 6
If i is more capacitor charges quickly If i is limited to I max then rate of change is
also limited
Slew rate indicates how rapidly the output of an OPAMP can change in response tochanges in the input frequency with input amplitude constant The slew rate changeswith change in voltage gain and is normally specified at unity gain
If the slope requirement is greater than the slew rate then distortion occurs For the 741C
the slew rate is low 05 V micro S which limits its use in higher frequency applications
18 Input Offset Voltage and Current Dr i f t
It is also called average temperature coefficient of input offset voltage or input offsetcurrent The input offset voltage drift is the ratio of the change in input offset voltage
to change in temperature and expressed in micro V degC Input offset voltage drift = ( ∆ Vio ∆ T)
Similarly input offset current drift is the ratio of the change in input offset current to
the change in temperature Input offset current drift = ( ∆ Iio ∆ T)
For 741C
∆ Vio ∆ T = 05 micro V C
∆ Iio ∆ T = 12 pA C
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Operational Amplifier
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 1
A 100 PF capacitor has a maximum charging current of 150 microA What is the slew rate
Solut ion
C = 100 PF=100 x 10-12 F
I = 150 microA = 150 x 10 -6 A
Slew rate is 15 V micros
Example - 2
An operational amplifier has a slew rate of 2 V micros If the peak output is 12 V what isthe power bandwidth
Solut ion
The slew rate of an operational amplifier is
As for output free of distribution the slews determines the maximum frequency of
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operation fmax for a desired output swing
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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so
So bandwidth = 265 kHz
Example - 3
For the given circuit in f ig 1 Iin(off) = 20 nA If Vin(off) = 0 what is the differential
input voltage If A = 105
what does the output offset voltage equal
Fig 1
Solut in
Iin(off) = 20 nA
Vin(off) = 0
(i) The differential input voltage = I in(off) x 1k = 20 nA x 1 k = 20micro V
(ii) If A = 105
then the output offset voltage V in(off) = 20 micro V x 105
= 2 volt
Output offset voltage = 2 volts
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 7 Parameter s of an OPAMPExample - 4
R1 = 100Ω Rf = 82 k RC = 10 k Assume that the amplifier is nulled at 25degC If V in is 20
mV peak sine wave at 100 Hz Calculate E r and Vo values at 45degC for the circuit shown
in f ig 2
Fig 2
Solut ion
The change in temperature ΔT = 45 - 25 = 20degC
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Error voltage = 5144 mV
Output voltage is 1640 mV peak ac signal which rides either on a +5144 mV or -5144 mVdc level
Example - 5
Design an input offset voltage compensating network for the operational amplifier microA 715for the circuit shown in f ig 3 Draw the complete circuit diagram
Fig 3
Solut ion
From data sheet we get vin = 5 mV for the operational amplifier microA 715
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V = | VCC | = | - VEE | = 15 V
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Now
If we select RC = 10Ω the value of Rb should be
Rb = (3000) RC = 30000Ω = 304Ω
Since R gt Rmax let RS = 10 Rmax where Rmax = Ra 4 Therefore
If a 124Ω potentiometer is not available we may prefer to use to the next lower valueavilable such as 104Ω so that the value of Ra will be larger than Rb by a factor of 10 If
we select a 10 kΩ potentiometer a s the Ra value Rb is 12 times larger than Ra Thus
Ra = 10 kΩ potentiometer
Rb = 30 kΩ
Rc = 10Ω
The final circuit which also includes the pin connections for the microA 715 shown in f ig 4
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 4
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lecture -7 Parameter s of an OPAMPThe ideal OPAMP
An ideal OPAMP would exhibit the following electrical characteristic
1 Infinite voltage gain Ad
2 Infinite input resistance Ri so that almost any signal source can drive it and there is
no loading of the input source3 Zero output resistance RO so that output can drive an infinite number of other devices
4 Zero output voltage when input voltage is zero5 Infinite bandwidth so that any frequency signal from 0 to infinite Hz can be amplified
without attenuation6 Infinite common mode rejection ratio so that the output common mode noise voltage is zero7 Infinite slew rate so that output voltage changes occur simultaneously with input
voltage changes
There are practical OPAMPs that can be made to approximate some of thesecharacters using a negative feedback arrangement
Equivalent Circuit of an OPAMP
Fig 5 shows an equivalent circuit of an OPAMP v1 and v2are the two input
voltage voltages Ri is the input impedance of OPAMP Ad Vd is an equivalent
Thevenin voltage source and RO is the Thevenin equivalent impedance looking back into
the terminal of an OPAMP
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 5
This equivalent circuit is useful in analyzing the basic operating principles of OPAMP andin observing the effects of standard feedback arrangements
vO = Ad (v1 ndash v2) = Ad vd
This equation indicates that the output voltage vO is directly proportional to the
algebraic difference between the two input voltages In other words the OPAMP amplifiesthe difference between the two input voltages It does not amplify the inputvoltages themselves The polarity of the output voltage depends on the polarity ofthe difference voltage vd
Ideal Voltage Transfer Curve
The graphic representation of the output equation is shown in f ig 6 in which the
output voltage vO is plotted against differential input voltage vd keeping gain Ad constant
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Fig 6
The output voltage cannot exceed the positive and negative saturation voltagesThese saturation voltages are specified for given values of supply voltages This meansthat the output voltage is directly proportional to the input difference voltage only untilit reaches the saturation voltages and thereafter the output voltage remains constant
Thus curve is called an ideal voltage transfer curve ideal because output offset voltageis assumed to be zero If the curve is drawn to scale the curve would be almostvertical because of very large values of Ad
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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or vd = vO Ad
Si A i l (id ll i fi it )
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
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v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Open loop OPAMP Configuration
In the case of amplifiers the term open loop indicates that no connection exists betweeninput and output terminals of any type That is the output signal is not fedback in any formas part of the input signal
In open loop configuration The OPAMP functions as a high gain amplifier There arethree open loop OPAMP configurations
The Differential Amplifier
Fig 1 shows the open loop differential amplifier in which input signals vin1 and vin2
are applied to the positive and negative input terminals
Fig 1
Since the OPAMP amplifies the difference the between the two input signalsthis configuration is called the differential amplifier The OPAMP amplifies both ac anddc input signals The source resistance R in1 and Rin2 are normally negligible compared to
the input resistance Ri Therefore voltage drop across these resistances can be assumed
to be zero
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Therefore
d
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v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
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vo = +Ad vin
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This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (3 of 3) [1252010 21403 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Electrical engineering
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
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gt Lec ture 2 gt Lec ture 3
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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Electrical engineering
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
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882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
882019 lec1-10 opamp
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6182
v1 = vin1 and v2 = vin2
vo = Ad (vin1 ndash vin2 )
where Ad is the open loop gain
The Inverting Amplifier
If the input is applied to only inverting terminal and non-inverting terminal is grounded thenit is called inverting amplifierThis configuration is shown in f ig 2
v1= 0 v2 = vin
vo = -Ad vin
Fig 2
The negative sign indicates that the output voltage is out of phase with respect to input 180degor is of opposite polarity Thus the input signal is amplified and inverted also
The non-inverting amplifier
In this configuration the input voltage is applied to non-inverting terminals and
inverting terminal is ground as shown in f ig 3
v1
= +vin
v2
= 0
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8ahtm (2 of 3) [1252010 21358 AM]
Electrical engineering
vo = +Ad vin
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6282
This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8ahtm (3 of 3) [1252010 21358 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6382
Operational Amplifier
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gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Electrical engineering
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httpslidepdfcomreaderfulllec1-10-opamp 6482
Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8bhtm (2 of 2) [1252010 21400 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6582
Operational Amplifier
gt Lec ture 1
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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Electrical engineering
with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6682
The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (3 of 3) [1252010 21403 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Electrical engineering
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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Electrical engineering
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
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gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
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Oscillator
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
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gt Lec ture 4
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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Electrical engineering
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
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Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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httpslidepdfcomreaderfulllec1-10-opamp 6282
This means that the input voltage is amplified by Ad and there is no phase reversal at
the output
Fig 3
In all there configurations any input signal slightly greater than zero drive the outputto saturation level This is because of very high gain Thus when operated in open-loopthe output of the OPAMP is either negative or positive saturation or switches betweenpositive and negative saturation levels Therefore open loop op-amp is not used inlinear applications
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8ahtm (3 of 3) [1252010 21358 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6382
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Electrical engineering
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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Electrical engineering
with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Electrical engineering
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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Electrical engineering
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Electrical engineering
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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Electrical engineering
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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Electrical engineering
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6382
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Closed Loop Amplifier
The gain of the OPAMP can be controlled if fedback is introduced in the circuit That isan output signal is fedback to the input either directly or via another network If thesignal fedback is of opposite or out phase by 180degwith respect to the input signalthe feedback is called negative fedback
An amplifier with negative fedback has a self-correcting ability of change in outputvoltage caused by changes in environmental conditions It is also known asdegenerative fedback because it reduces the output voltage andin ternreduces thevoltage gain
If the signal is fedback in phase with the input signal the feedback is called positivefeedback In positive feedback the feedback signal aids the input signal It is also knownas regenerative feedback Positive feedback is necessary in oscillator circuits
The negative fedback stabilizes the gain increases the bandwidth and changes the inputand output resistances Other benefits are reduced distortion and reduced offsetoutput voltage It also reduces the effect of temperature and supply voltage variation onthe output of an op-amp
A closed loop amplifier can be represented by two blocks one for an OPAMP and other fora feedback circuits There are four following ways to connect these blocksThese connections are shown in f ig 4
These connections are classified according to whether the voltage or current is feedbackto the input in series or in parallel
Voltage ndash series feedback Voltage ndash shunt feedback Current ndash series feedback Current ndash shunt feedback
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Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Electrical engineering
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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Electrical engineering
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Electrical engineering
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
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vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
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882019 lec1-10 opamp
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Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
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Electrical engineering
R1 = 1K
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Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
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Electrical engineering
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Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
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httpslidepdfcomreaderfulllec1-10-opamp 6482
Fig 4
In all these circuits of f ig 4 the signal direction is from input to output for OPAMP and
output to input for feedback circuit Only first two feedback in circuits are important
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
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Electrical engineering
with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
882019 lec1-10 opamp
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The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
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Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
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Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
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Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
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This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
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Electrical engineering
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Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
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Electrical engineering
882019 lec1-10 opamp
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Operational Amplifier
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
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gt Lec ture 2 gt Lec ture 3
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gt Lec ture 5
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
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The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
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Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
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Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
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gt Lec ture 5
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gtLec ture 10
OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 8 Open loop OPAMP Configurat io n
Vol tage ser ies feedback
It is also called non-inverting voltage feedback circuit With this type of feedback theinput signal drives the non-inverting input of an amplifier a fraction of the output voltageis then fed back to the inverting input The op-amp is represented by its symbol includingits large signal voltage gain Ad or A and the feedback circuit is composed of two resistors
R1 and Rf as shown in f ig 5
Fig 5
The feedback voltage always opposes the input voltage (or is out of phase by 180deg
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (1 of 3) [1252010 21403 AM]
Electrical engineering
with respect to input voltage) hence the feedback is said to be negative
The closed loop voltage gain is given by
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6682
The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (2 of 3) [1252010 21403 AM]
Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (3 of 3) [1252010 21403 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
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gt Lec ture 14
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gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
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gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
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gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (1 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6982
Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
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gtLec ture 10
OPAMP Apllications
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Oscillator
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
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httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
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Oscillator
gt Lec ture 21 gt Lec ture 22
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11
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Oscillator
gt Lec ture 21 gt Lec ture 22
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gt Lec ture 25
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Voltage Regulator
gt Lec ture 27
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6682
The closed loop voltage gain is given by
The product A and B is called loop gain The gain loop gain is very large such that AB gtgt 1
This shows that overall voltage gain of the circuit equals the reciprocal of B thefeedback gain It means that closed loop gain is no longer dependent on the gain of theop-amp but depends on the feedback of the voltage divider The feedback gain B canbe precisely controlled and it is independent of the amplifier
Physically what is happening in the circuit The gain is approximately constant eventhough differential voltage gain may change Suppose A increases for some
reasons (temperature change) Then the output voltage will try to increase This meansthat more voltage is fedback to the inverting input causing vd voltage to decrease
This almost completely offset the attempted increases in output voltage
Similarly if A decreases The output voltage decreases It reduces the feedback voltagevf and hence vd voltage increases Thus the output voltage increases almost to same level
Different Input voltage is ideally zero
Again considering the voltage equation
vO = Ad vd
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (2 of 3) [1252010 21403 AM]
Electrical engineering
or vd = vO Ad
Si A i l (id ll i fi it )
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (3 of 3) [1252010 21403 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
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gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (1 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6982
Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
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Oscillator
gt Lec ture 21 gt Lec ture 22
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gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6782
Since Ad is very large (ideally infinite)
there4 vd asymp 0
and v1 = v2 (ideal)
This says that the voltage at non-inverting input terminal of an op-amp is approximately
equal to that at the inverting input terminal provided that Ad is very large This conceptis useful in the analysis of closed loop OPAMP circuits For example ideal closedloop voltage again can be obtained using the results
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec8chtm (3 of 3) [1252010 21403 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (1 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6982
Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6882
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Input Resistance with Feedback
f ig 1 shows a voltage series feedback with the OPAMP equivalent circuit
Fig 1
In this circuit Ri is the input resistance (open loop) of the OPAMP and Rif is the
input resistance of the feedback amplifier The input resistance with feedback is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (1 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6982
Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 6982
Since AB is much larger than 1 which means that Rif is much larger that Ri Thus
Rif approaches infinity and therefore this amplifier approximates an ideal voltage amplifier
Output Resistance with Feedback
Output resistance is the resistance determined looking back into the feedback amplifierfrom the output terminal To find output resistance with feedback Rf input vin is reduced
to zero an external voltage Vo is applied as shown in f ig 2
Fig 2
The output resistance (Rof ) is defined as
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (2 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7082
This shows that the output resistance of the voltage series feedback amplifier is ( 1 1+AB ) times the output resistance Ro of the op-amp It is very small because (1+AB) is
very large It approaches to zero for an ideal voltage amplifier
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9ahtm (3 of 3) [1252010 20921 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7182
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Reduced Non-linear Distortion
The final stage of an OPAMP has non-linear distortion when the signal swings over mostof the ac load line Large swings in current cause the r e of a transistor to change during
the cycle In other words the open loop gain varies throughout the cycle of when alarge signal is being applied It is this changing voltage gain that is a source of the non-linear distortion
Noninverting voltage feedback reduces non-linear distortion because the feedbackstabilizes the closed loop voltage gain making it almost independent of the changes inopen loop voltage gain As long as loop gain is much greater than 1 the outputvoltage equals 1B times the input voltage This implies that output will be a morefaithful reproduction of the input
Consider under large signal conditions the open loop OPAMP circuit produces adistortion voltage designated vdist It can be represented by connecting a source v dist
in series with Avd Without negative feedback all the distortion voltage v dist appears at
the output But with negative feedback a fraction of v dist is feedback to inverting input This
is amplified and arrives at the output with inverted phase almost completely cancelingthe original distortion produced by the output stage
The first term is the amplified output voltage The second term in the distortion that appearsat the final output The distortion voltage is very much reduced because ABgtgt1
Bandwidth with Feedback
The bandwidth of an amplifier is defined as the band of frequencies for which thegain remains constant Fig 3 shows the open loop gain vs frequency curve of
741C OPAMP From this curve for a gain of 2 x 105 the bandwidth is approximately 5HzOn the other hand the bandwidth is approximately 1MHz when the gain is unity
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (1 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7282
Fig 3
The frequency at which gain equals 1 is known as the unity gain bandwidth It isthe maximum frequency the OPAMP can be used forFurthermore the gain bandwidth product obtained from the open loop gain vsfrequency curve is equal to the unity gain bandwidth of the OPAMPSince the gain bandwidth product is constant obviously the higher the gain the smaller
the bandwidth and vice versa If negative feedback is used gain decrease from A to A (1+AB) Therefore the closed loop bandwidth increases by (1+AB)
Bandwidth with feedback = (1+ A B) x (BW without feedback)
ff= fo (1+A B)
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9bhtm (2 of 2) [1252010 20922 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7382
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 9 Closed Loop Ampli f ier
Output Offset Voltage
In an OPAMP even if the input voltage is zero an output voltagecan exist There are three cause of this unwanted offset voltage
1 Input offset voltage2 Input bias voltage3 Input offset current
Fig 4 shows a feedback amplifier with an output offset voltage
source in series with the open loop output AVd The actual output
offset voltage with negative feedback is smaller The reasoning issimilar to that given for distortion Some of the output offset voltageis fed back to the inverting input After amplification an out of phasevoltage arrives at the output canceling most of the original outputoffset voltage
When loop gain AB is much greater than 1 the closed loop outputoffset voltage is much smaller than the open loop output offsetvoltage
Fig 4
Voltage Follower
The lowest gain that can be obtained from a non-inverting amplifier with feedback is 1When the non-inverting amplifier gives unity gain it is called voltage follower becausethe output voltage is equal to the input voltage and in phase with the input voltage Inother words the output voltage follows the input voltage
To obtain voltage follower R1 is open circuited and Rf is shorted in a negative
feedback amplifier of f ig 4 The resultant circuit is shown in f ig 5
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (1 of 2) [1252010 20923 AM]
Electrical engineering
vout = Avd= A (v1 ndash v2)
v1 = vi
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
gt Lec ture 9
gtLec ture 10
OPAMP Apllications
gtLec ture 11
gt Lec ture 12 gt Lec ture 13
gt Lec ture 14
gt Lec ture 15
gt Lec ture 16
gt Lec ture 17
gt Lec ture 18
gt Lec ture 19
gt Lec ture 20
Oscillator
gt Lec ture 21 gt Lec ture 22
gt Lec ture 23
gt Lec ture 24
gt Lec ture 25
gt Lec ture 26
Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7482
v1 = vin
v2 =vout
v1 = v2 if A gtgt 1
vout = vin
The gain of the feedback circuit (B) is 1 Therefore
Af = 1 B = 1Fig 5
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec9chtm (2 of 2) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
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OPAMP Apllications
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Oscillator
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Voltage Regulator
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Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7582
Operational Amplifier
gt Lec ture 1
gt Lec ture 2 gt Lec ture 3
gt Lec ture 4
gt Lec ture 5
gt Lec ture 6
gt Lec ture 7
gt Lec ture 8
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OPAMP Apllications
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Oscillator
gt Lec ture 21 gt Lec ture 22
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gt Lec ture 25
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Voltage Regulator
gt Lec ture 27
gt Lec ture 28
gt Lec ture 29
gt Lec ture 30
Analog C i rcu i ts ProfPramod Agarwal
Lect ure - 10 Vol tage Shunt Feedback
Voltage shunt Feedback
Fig 1 shows the voltage shunt feedback amplifier using OPAMP
Fig 1
The input voltage drives the inverting terminal and the amplified as well as invertedoutput signal is also applied to the inverting input via the feedback resistor Rf
This arrangement forms a negative feedback because any increase in the outputsignal results in a feedback signal into the inverting input signal causing a decrease inthe output signal The non-inverting terminal is grounded Resistor R1 is connected in
series with the source
The closed loop voltage gain can be obtained by writing Kirchoffs current equation atthe input node V2
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (1 of 3) [1252010 20923 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7682
The negative sign in equation indicates that the input and output signals are out of phaseby 180 Therefore it is called inverting amplifier The gain can be selected by selecting Rf
and R1 (even lt 1)
Inverting Input at Virtual Ground
In the f ig 1 shown earlier the noninverting terminal is grounded and the- input signal
is applied to the inverting terminal via resistor R1 The difference input voltage vd isideally zero (vd= vO A) is the voltage at the inverting terminals (v2) is approximately equal
to that of the noninverting terminal (v1) In other words the inverting terminal voltage (v1)
is approximately at ground potential Therefore it is said to be at virtual ground
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10ahtm (2 of 3) [1252010 20923 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7782
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7882
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 7982
Similarly the bandwidth increases by (1+ AB) and total outputoffset voltage reduces by (1+AB)
Fig 3
GOTO gtgt 1 || 2 || 3 || Home
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10bhtm (2 of 2) [1252010 20924 AM]
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8082
Electrical engineering
R1 = 1K
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8182
Example - 2
An inverting amplifier shown in f ig 4 with R1 = 10Ω and R2 = 1MΩ is driven by a source v1
= 01 V Find the closed loop gain A the percentage division of A from the ideal value -
R2 R1 and the inverting input voltage VN for the cases A = 100 VV 105 and 105 VV
Solut ion
we have
when A = 103
Fig 4
fileC|UsersPublicDocumentsANALOG20INTEGRATED20CIRCUITSlec10chtm (2 of 3) [1252010 20916 AM]
Electrical engineering
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
882019 lec1-10 opamp
httpslidepdfcomreaderfulllec1-10-opamp 8282
Example - 3
Find VN V1 and VO for the circuit shown in f ig 5
Solut ion
Applying KCL at N
or 2VN + VN = VO
Now VO - Vi = 6 as point A and N are virtually shorted
VO - VN = 6 V
Therefore VO = VN + 6 V
Therefore VN = Vi = 3 V
Fig 5
GOTO gtgt 1 || 2 || 3 || Home
