Convertisseur ADC et Timer

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    E COLE POLYTECHNIQUE DE T UNISIE

    R OBO CEPT

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    CompteurZero=> dclenche une interruptionPIC16F84: 1 timer (TIMER1).PIC16F877: 3 timer:

    Timer0: 8-bit timer/counter with 8-bitprescaler

    Timer1: 16-bit timer/counter with prescaler,can be incremented during SLEEP via

    external crystal/clock Timer2: 8-bit timer/counter with 8-bit period

    register, prescaler and postscaler

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    Le module TMR0 (Timer 0) possde deux modesde fonctionnement :

    1- Le mode timerT0CS = 0 (bit 5 du registre OPTION_REG )

    2- Le mode compteur

    T0CS = 1 (bit 5 du registre OPTION_REG )

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    1- Le mode timerT0CS=0 (bit 5 du registre OPTION_REG )Incrmentation de TMR0 chaque cycle de

    l'horloge interne.1 cycle ->1 s pour quartz de 4 MHzNotez que si le contenu du registre TMR0 est 255(0xFF), il passera 0 (0x00) la prochaine

    incrmentation.

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    OPTION REGbit 7 RBPU : PORTB Pull-up Enable bit

    1 = PORTB pull-ups are disabled0 = PORTB pull-ups are enabled by individual port latch values

    bit 6 INTEDG: Interrupt Edge Select bit1 = Interrupt on rising edge of RB0/INT pin0 = Interrupt on falling edge of RB0/INT pin

    bit 5 T0CS: TMR0 Clock Source Select bit

    1 = Transition on RA4/T0CKI pin0 = Internal instruction cycle clock (CLKOUT)bit 4 T0SE: TMR0 Source Edge Select bit

    1 = Increment on high-to-low transition on RA4/T0CKI pin0 = Increment on low-to-high transition on RA4/T0CKI pin

    bit 3 PSA: Prescaler Assignment bit

    1 = Prescaler is assigned to the WDT0 = Prescaler is assigned to the Timer0 module

    bit 2-0 PS2:PS0: Prescaler Rate Select bits

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    PS2 PS1 PS0 PSA=0 PSA=1

    0 0 0 2 1

    0 0 1 4 2

    0 1 0 8 4

    0 1 1 16 8

    1 0 0 32 16

    1 0 1 64 32

    1 1 0 128 64

    1 1 1 256 128

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    INTCON

    Bit 7 GIE: Global Interrupt Enable bit

    Bit 6 PEIE: Peripheral Interrupt Enable bitBit 5 T0IE: TMR0 Overflow Interrupt Enable bitBit 4 INTE: RB0/INT External Interrupt Enablebit

    Bit 3 RBIE: RB Port Change Interrupt EnablebitBit 2 T0IF: TMR0 Overflow Interrupt Flag bitBit 1 INTF: RB0/INT External Interrupt Flag bit

    Bit 0 RBIF: RB Port Change Interrupt Flag bit1 = At least one of the RB7:RB4 pins changed state0 = None of the RB7:RB4 pins have changed state

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    2- Le mode compteur T0CS = 1 (bit 5 du registre OPTION_REG )

    Incrmentation chaque front du signal prsent sur la brocheRA4/T0CKI :

    Front montant si T0SE = 0 (bit 4 du registre OPTION_REG) Front descendant si T0SE = 1

    Prescaler rgl 1 (bit 3 du registre OPTION_REG = PSA = 1)Watchdog.

    Avec un taux de prdivision de 32 (PSA = 0, PS2 = 1, PS1 = 0, PS0 =0), le contenu du registre TMR0 est incrment tous les 32 cycles dusignal prsent sur la broche RA4/T0CKI.

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    Convertisseur analogique numrique

    2 register essentiel:-ADCON0

    -ADCON1

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    ADCON0Bit 7-6 ADCS1:ADCS0: A/D Conversion Clock Select bits00 = FOSC/2

    01 = FOSC/810 = FOSC/3211 = FRC (clock derived from the internal A/D module RC oscillator)Bit 5-3 CHS2:CHS0: Analog Channel Select bits000 = channel 0, (RA0/AN0)001 = channel 1, (RA1/AN1)

    010 = channel 2, (RA2/AN2)Bit 2 GO/DONE: A/D Conversion Status bitIf ADON = 1:1 = A/D conversion in progress (setting this bit starts the A/D conversion)0 = A/D conversion not in progress (this bit is automatically cleared byhardware when the A/D conversion is complete)Bit 1 Unimplemented: Read as '0'Bit 0 ADON: A/D On bit1 = A/D converter module is operating0 = A/D converter module is shut-off and consumes no operating current

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    ADCON1 10000000

    bit 7 ADFM: A/D Result Format Select bit1 = Right justified. 6 Most Significant bits of

    ADRESH are read as 0.

    0 = Left justified. 6 Least Significant bits of ADRESL are read as 0.bit 6-4 Unimplemented: Read as '0'bit 3-0 PCFG3:PCFG0: A/D Port

    Configuration Control bits

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    ADCON1

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    ADCON1

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    bit 7 PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bitbit 6 ADIE: A/D Converter Interrupt Enable bit1 = Enables the A/D converter interrupt0 = Disables the A/D converter interruptbit 5 RCIE: USART Receive Interrupt Enable bitbit 4 TXIE: USART Transmit Interrupt Enable bit

    bit 3 SSPIE: Synchronous Serial Port Interrupt Enable bitbit 2 CCP1IE: CCP1 Interrupt Enable bitbit 1 TMR2IE: TMR2 to PR2 Match Interrupt Enable bitbit 0 TMR1IE: TMR1 Overflow Interrupt Enable bit

    PIE1

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    1. Configure the A/D module: Configure analog pins/voltage reference anddigital I/O (ADCON1 bit3-0) Select A/D input channel (ADCON0 bit5 -3) Select A/D conversion clock (ADCON0 bit7 -6) Turn on A/D module (ADCON0 bit0)

    2. Configure A/D interrupt (if desired): Clear ADIF bit (PIR1 BIT 6) conversion is not complete Set ADIE bit ( PIE1 BIT 6) Enables A/D interrupt

    Set PEIE bit ( INTCON Bit6 ) Peripheral InterruptEnable bit Set GIE bit (INTCON bit7) Global Interrupt Enable

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    3. Wait the required acquisition time.

    4. Start conversion: Set GO/DONE bit (ADCON0 2bit)

    5. Wait for A/D conversion to complete, by either:

    Polling for the GO/DONE bit to be cleared(with interrupts enabled)OR

    Waiting for the A/D interrupt ( ADIF BIT 6 OF PIR1)

    6. Read A/D result register pair(ADRESH:ADRESL), clear bit ADIF if required.

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    E XEMPLE SUR M ICRO C

    Exemple 1: Convertisseur Analogique/NumriqueExemple 2: Timer TMR0

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    E XEMPLE 1 :int i,a,b;int out;

    void init(void)

    void main (){init();while(1){

    ADCON0.F2= 1; //remise 1 de ADCON0F.2 pour car passe 0 aprs conversion sinon onrelance pas la conversion

    while(ADCON0.F2==1){ //Attente pour l'acquisition du rsultatnop();}

    PORTB=ADRESL;

    PORTD=ADRESH;

    }}

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    E XEMPLE 1 :void init(void){//initialisation:TRISA.F0=1; // initialisation comme entreTRISB=0; //initialisation comme sortieTRISD=0; //initialisation comme sortie

    ADCON0=0b10000101; //clock=FOSC/2 // channel RA0 entre // start ADCON1=0b10000000; // LSB configurationout=0;a=0;b=0;PORTB=0;PORTD=0;//fin initialisation}

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    E XEMPLE 2 :unsigned int cnt;unsigned int a;void prog();void main() {

    cnt = 0; // Initialize cntOPTION_REG = 0x84; // Assign prescaler to TMR0TRISB = 0; // PORTB is outputINTCON = 0b10100000; // Enable TMRO interruptPORTB= 0 ; // Initialize PORTB zeroa = 0; // Initialize awhile (1){

    prog();}

    }

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    E XEMPLE 2 :void interrupt() {

    cnt++; // Increment value of cnt on every interruptINTCON = 0b00100000; // Set T0IE , clear T0IF

    }

    void prog(){

    while (a < 10) {if (cnt==20) {TMR0=0; // reset du TMR0cnt = 0; // Reset cntif (a==0) PORTB= 0x3F;else if (a==1) PORTB= 0x06; else if (a==2) PORTB= 0x5B;else if (a==3) PORTB= 0x4F; else if (a==4) PORTB= 0x66;else if (a==5) PORTB= 0x6D; else if (a==6) PORTB= 0x7D;

    else if (a==7) PORTB= 0x07; else if (a==8) PORTB= 0x7F;else if (a==9) PORTB= 0x6F;a ++; // Increment value of a

    }}

    if (a ==10) a=0;}

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    S IMULATION ISIS

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    Merci Pour Votre Attention