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ESE319 Introduction to Microelectronics

12009 Kenneth R. Laker, update 23Sep11

BJT Biasing Cont.

Biasing for DC Operating Point Stability

BJT Bias Using Emitter Negative Feedback Single Supply BJT Bias Scheme Constant Current BJT Bias Scheme Rule of Thumb BJT Bias Design

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Previous Simple Base BiasingSchemes

What's wrong with these schemes?

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Biasing for Operating Point StabilityA practical biasing scheme must be insensitive to

changes in transistor and operating temperature!Negative feedback is one solution.

IC

IB

IE RE

RC

VCC

VB

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ICISe

VBE

VT

VBE=VBRE IE=VBREIC

Basic relationships:

IE=IBIC=1IB

IE=1IC= 1

IC

Given the (DC bias) equations:

Assume: VBE=0.7Vbe given andI

Cbe specified. Then

computeRE

to obtain the specified

collector currentIC:

RE=VB0.7

IC

, Let: VB,VCC

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Negative feedback makes the collector current insensitive to VBE,I

S, and.

IfIC

increases due to an increase inIS

then VBE

will decrease; thus, limit-

ing the magnitude of the change inIC.

The equations that must be satisfied simultaneously are:

Negative Feedback via RE

IC=VBVBE

1RE=

VBVBERE

VBE=VBREIC

=VB

1

RE ICIC=ISe

VBE

VT and

ifIS

=>IC whenIC => VBE

IC> V

BE VBE

insensitivityICVB

RE=>

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Scilab Analysis of IC Insensitivity to IS

Simultaneous equations:

IC=ISe

VBE

VT

IC=VBVBE

RE

or: VBVBERE

=ISe

VBE

VT

If we plot the exponential function and the straight line function,the solution values ofI

Cand V

BEfor the circuit occur at their

intersection.

Let RE=4k VB=4.7Vand (want VB >> VBE)

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Scilab Program

//Calculate and plot npn BJT bias characteristicbeta=100;alpha=beta/(beta+1);VsubT=0.025;VTinv=1/VsubT;

VBB=4.7;Re=4;vBE=0.0:0.01:1;iCline=alpha*(VBB-vBE)/Re;//mA.plot(vBE,iCline);iC=0.01:0.01:2; //mA.!IsubS =1E-16; //mA.

for k= 1:1:8IsubS=10*IsubS;

vBE2=VsubT*log(iC/IsubS);plot(vBE2,iC); //Current in mA.

end

IC=VBVBE

RE

VBE=VTlnIC

IS

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IC

vs IS

Results Plot

IS=1011

IS=1018

IC0.1

mA InsensitivetoIS!

IC=VBVBE

RE

IC=ISe

VBE

VT

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RE=VB0.7

IC

Example: =100

VB=4.7V

IC=1mA

RE=0.994.70.7

103

=100

1010.99

IC=VB0.7

RE

=

1103A

WritingIC

as a function of:

Assume: 100200

100

101103=0.990mAIC

200

201103=0.995mA

SoIC

is insensitive to changes in !

RE4000

Insensitivity to Beta

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Voltage Source With Internal Resistance

IB

IC

VB=IB RBVBE1IBRE

IB=VBVBE

RB1RE

IE=1IB

IC=I

B=

RB1REV

BV

BE

IC=IB

1

VBVBE

RE=

VBVBE

RE

If RB1RE

IE

RC

RE

RB

VB

VCC

If RB1RE

IC=IB

RBVBVBE no feedback!

IE

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Biasing for Operating Point Stability

Quick ReviewWhat is the purposeR

E?

What doesRB

represent?

What is the condition on thevalue ofV

B?

What is the condition on the

value ofRE?

What is our rule of thumb forachievingx >> y?

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Emitter-Feedback Bias Design

Voltage bias circuit Single power supply version

R1

R2

VCC

RC

RE

IC

IE

IB

VB

+

-

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RTh=RB=R1R2

RTh

VTh

VTh=VB=R

2

R1R

2

VCC

Thevenin Equivalent

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Thevenin EquivalentUse Thevenin's theorem to simplifybase circuit:

RTh=RB=R1R2=R1R2

R1R

2

= R1

1

Since we will specify VCC

, VB

andRB

, the inverse is needed

for design:

1

1=

VB

VCC=

R1

R2

=VCC

VB1

R1=1RB

VB=1

1VCC

Let:

R2=R

1

DesignEqs.

IB0

VTh=VB=R

2

R1R

2

VCC

determine

determineR1

R1R

2

R1R

2

=R

1

1R

2=

R1

determineR

2

I1

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A Rule of Thumb for Single Supply Biasing1. ChooseR

T= R

1+ R

2so that I

1

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IC

R1

R2

RC

RE

VCCI

E

VCB+

-

VB

+

-

+

-

VRc

Three design goals so far

RB1REVBVBE

Constraint: VCC=VRcVCBVBTRADEOFF Increase V

B=> Reduce V

Rc+ V

CB

VRc

too large => potential for saturation to reduce op-

erating range (i.e. vC < vB).V

Rctoo small => potential for cutoff to reduce operat-

ing range (i.e. iC

-> small or zero).

NEED A COMPROMISE!

An Unavoidable Design Tradeoff

I1IC also I1IB

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Another Useful Rule of Thumb1/3, 1/3, 1/3 Rule

VB=VCC

3VRc=IC RC=

VCC

3VCB=VCCVRcVB=

VCC

3

VCC=VRcVCBVB

RC=VRc

IC=

VCC

3IC

RE=VBVBE

IE=

VCC

3 0.7V

IE

VCCR

2

R1R

2

=VB=VCC

3

Design Equations

where

IC

R1

R2

RC

RE

VCCIE

VCB+

-

VB

+

-

+

-

VRc

VB=V

BEI

EREI

1R

2

VBE=0.7V

VB

>> VBE

VCE=VRcVReVCC

3

VRe=IE RE

or

I1=

VCC

RT=

IC

10

R2=RT V

B

VCC=13

RT

R1=RT1

VB

VCC=

2

3RT

RT

= R1

+ R2

I1

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Biasing for Operating Point Stability

Quick ReviewWhat is the condition on the value ofV

B?

What is the condition on the value ofRE?

What is the purpose forR1

&R2?

What happened toRB?

What is the constraint on the value ofI1?

What is the 1/3, 1/3, 1/3 Rule?

IC

R1

R2

RC

RE

VCCI

E

VCB+

-

VB

+

-

+

-

VRc

I1

IB

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Constant Emitter Current BiasThe current mirroris used to create a current source:

1. A BJT collector is the cur-rent source:

IC=ISe

VBE

VT

IREF

I

2. A diode-connected transistor sets thecurrent.

3. ChooseRref

for the desired

current:

Rref=VCC0.7

IREFVCC

0.7

IC1

VBE2=VBE1

IO

IREF=IC1IB1IB2IC1IE1

IREF=VCCVBE1

Rref

RrefVCC IC1

IB1IB2

VCE1=VBE1

4. IfQ1 = Q2 thenIC2

= IC1

=> IOIrefmatched

IO=IC2

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Constant Emitter Current

IfQ1

and Q2

have the same saturation current:

Now: VBE1

= VBE2

IS1=IS2

And the transistors are at the same temperature: T1=T2

The two collector currents set primarily by Rref

are

equal, as long as Q2 is not saturated.

IO=IC2=IREFVCC0.7

Rref

VCE1

VCE2

, the Early Effect needs to be included in simulations.

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Constant Emitter Current Early Voltage

IC2=IO

IB2

IB1

IC1

Assume Q1 = Q2

IO=IC2=ISeVBE/VT1

VCE2

VA

Early Effect

SinceIB

is not effected by VA

, i.e.

IB2= ISeVBE/VT= IC2

F

For Q2:

For Q1:IB1

= IB2

IREF=IC1IB1IB2=IC12 IB

VBE2=VBE1=VCE1=VBE

IREF=ISeVBE/VT1

VCE1

VA2

IS

e

VBE

VT

F=1VCE2

VAwhere

ISeVBE/VT1

VBE

VA2

IS

e

VBE

VT=

Solving for IS eVBE/VT

IS eVBE/VT=

IREF

1VBE

VA2

IO=IC2=IREF

1VCE2

V A

1VBE

VA

2

(1) (2)

Sub (2) into (1)

RrefIREF

VCC

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Constant Emitter Current Early Voltage Cont.

IO=IC2=IREF

1VCE2

V A

1VBE

VA

2

=>IO

IREF=

1VCE2

VA

1VBE

VA

2

Let VA= => Early effect is negligibleIO

IREF=

1

12

1

IO=IREF=>

Let VA = finite and VA = 50 V, VBE= 0.7 V, =100

IO

IREF= fVCE2=

10.02VCE21.034

=0.9710.02VCE2

If also =

IREF

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We thus can use a current mirrorto provide stable control of tran-sistor collector current.R

refsets

the emitter and collector currentsand the collector-ground voltageforQ

amp.

vin

is the ac input voltage source.

RB

can be any reasonable value

this is not voltage biasing!

Rref

Rref

RB

VB

VCC

vin

Iref

iE

Qamp

Q1

Q2

iEvin

VCC

RBRC

BJT Emitter Current Source Bias

RC

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Summary Two practical methods for achieving stable

bias for a BJT are:

Use a dc voltage source in the base with afeedback resistance in the emitter circuit. Place a dc current source directly in the emitter

circuit.

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Emitter-Feedback Bias Design

1. Use single supply for base bias and collector sources.2. Use theI

C/10 rule for the currentI

1through the base bias

network (R1 andR2).3-1. Try less negative feedback using a smaller emitterresistorR

Esaving more of the V

CCsupply voltage for the

RC

voltage drop.

or

3-2. Use the 1/3, 1/3, 1/3 Rule.

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I1=

IC

10

Try 3-1 Emitter-Feedback Bias Design

VCC=12V

Complete the bias design giventhe following design values:

IC=1mA VC=6V

It follows:

RC=VRc

IC=VCCVC

IC=6k

I1= IC10=0.1mAR1R2=VCCI

1

= 1210

4=120 k

VC

=100RC

RE

R1

R2

VCC

VRc=6V

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3-1 Emitter-Feedback Bias - Cont.

Let's choose a small feedback voltage, sayV

Re= 1 V. Ignoring the base current:

RE=VRe

IE1V

IC=1 k

Then the voltage across R2

is 1.7 V

R2=

1.7V

104

A=17 k

R1=120k17k=103 k

RB=R1R214.5 k1

101RE10 k

I1

= 0.1 mA

IC=1mA

R1R2=120

k

R1

RE

RB1

101RERecall:

VB=1.7V

RC

VCC

RC

= 6kPrevious

slide

R2

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3-2 Emitter-Feedback 1/3, 1/3, 1/3 Rule Bias

VRc=VB=VCC

3=4V

RC=VRc

IC=

4V

103

A=4 k

RE= 4V0.7VIC=3.3 k

Then the voltage acrossR2

is VB

= 4 V

R2=

4V

104

A=40 k

4

Let's choose

R1=120k40k=80 kRB

1

101RERecall:

RB=R1R226.7 k1

101RE33 k

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RECALL: Bias Stability Condition Argument

IB

IC VB=IBRBVBE1RE IB

IB=VBVBE

RB1RE

IE=1IB

IC=IB=

RB1REVBVBE

IC=IB

1

VBVBE

RE=

VBVBE

RE

RB1REif

RC

RE

RB

VB

VCC

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IC=IB=

RB1REVBVBE

RC

RE

RB

VB

RE

IC

IB

VCC= 12VV

B= 1.7 V

VBE

= 0.7 V

IC

= 1 mA

= 100

RC

= 6k

RE

= 1 k

RB

= 14.5 k

= 100; IC

= 0.873 mA

= 200; IC= 0.932 mA = ; I

C= 1 mA

= 100 & RB

= 0 ; IC

= 0.99 mA

3-1 Emitter-Feedback Sensitivity

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3-1 Emitter-Feedback IS

Sensitivity

//Rule of thumb BJT bias sensitivityBeta=100;VsubT=0.025;VB=1.7;Rb=14.5;BetaPlusRe=101;

vBE=0.0:0.01:1;iCline=Beta*(VB-vBE)/(Rb+BetaPlusRe);//mA.plot(vBE,iCline);iC=0.01:0.01:2; //mA.!IsubS =1E-16; //mA.for k= 1:1:8

IsubS=10*IsubS;vBE2=VsubT*log(iC/IsubS);plot(vBE2,iC); //Current in mA.

end

Sensitivity toIS

//3-1 Bias Scheme with Re=1 K

Re=1;IC=

RB1REVBVBE

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3-1 Scilab Plot (Zoomed)

IS=1011

IS=1018

IC0.4mA

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IS=1011

IS=1018

IC0.1mARB0

or

RB1RE

Compare to IC

vs IS

Results Plot with Ideal

Emitter Feedback (1/3,1/3,1/3 Rule)

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Conclusion

1/3, 1/3, 1/3 Rule Provides a Good Compromise BaseVoltage Bias Scheme

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