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Introduction & Construction of Decoders Basic
2-to-4 3-to-8 1-to-10 & BCD to 7 Segment Decoders
Logic Design & Switching Theory
Prof. Mohammad Salman Aslam
Faculty of Engineering
University of Central Punjab
Lecture No: 12
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FacultyofEngineering-
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Functional Blocks
Digital systems consists of
many components (blocks)
Useful blocks needed in many
designs Arithmetic blocks
Encoders
Decoders
Multiplexers
Demultiplexers
iPhone motherboard (torontophonerepair.com)
Introduction & Construction of Decoders
Examples
ofMSI devices
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A Decoder is a digital circuit that is used for the conversion
of an n-bit input code to an m-bit output code with
n
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The simplest decoder is a n-to-2n binary decoder, where it has only set ofn-input values and the output is the 2n equivalent bit generated code
related to binary number corresponding as the active input. For an 2-to-4 binary code with inputs I0-I1 the logic expressions of
the outputs Y0-Y3 with respect to inputs are:
I0 = Y1 + Y3I1 = Y2 + Y3
For an 3-to-8 binary decoder with inputs I0-I2 the logic expressions
of the outputs Y0-Y7 with respect to inputs are:
I0 = Y1 + Y3 + Y5 + Y7
I1 = Y2 + Y3 + Y6 + Y7
I2 = Y4 + Y5 + Y6 + Y7
Introduction & Construction of Decoders
BinaryEncoder2(n) Inputs BinaryDecoder 2n
=22=
4outputs
2n =23 = 8
outputs
Binary
Decoder3(n) Inputs
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Introduction & Construction of Decoders
Figure: A typical Decoder block Diagram
Figure: Basic Decoder block Diagram
Figure: Decoder block diagram
with Enable input
2n outputs..
.
.
n inputs n-to-2
n
Decoder
.
.
.
2n
outputs
n-to-2n
Decoder
Enable bit
.n inputs
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Introduction & Construction of Decoders
Truth Table & Logic Diagram of Basic 2-to-4
Decoder with Enable input
EN A1 A0 D0 D1 D2 D3
0 X X 0 0 0 0
1 0 0 1 0 0 0
1 0 1 0 1 0 0
1 1 0 0 0 1 0
1 1 1 0 0 0 1
Truth Table
Circuit Diagram of 2-to-4 Decoderwith Enable input
Truth Table of 2-to-4 Decoder
with Enable InputIntro.
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Introduction & Construction of Decoders
FIGURE: Truth table and Logic circuit for
a 3-line-to-8-line decoder. For proper
operation, one input and its relevant output
should be active at one time.
33--toto--88 OROR 33--lineline--toto--88--line (or 1line (or 1--ofof--8) decoder.8) decoder.
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Introduction & Construction of Decoders33--toto--88 OROR 33--lineline--toto--88--line (or 1line (or 1--ofof--8) decoder.8) decoder.
3-to-8
Decoder
D0D1D2D3D4D5D6D7
A0A1A2
A2 A1 A0 D0 D1 D2 D3 D4 D5 D6 D7
0 0 0 1 0 0 0 0 0 0 0
0 0 1 0 1 0 0 0 0 0 0
0 1 0 0 0 1 0 0 0 0 0
0 1 1 0 0 0 1 0 0 0 0
1 0 0 0 0 0 0 1 0 0 0
1 0 1 0 0 0 0 0 1 0 01 1 0 0 0 0 0 0 0 1 0
1 1 1 0 0 0 0 0 0 0 1
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Introduction & Construction of Decoders33--toto--88 OROR 33--lineline--toto--88--line (or 1line (or 1--ofof--8) decoder.8) decoder.
3-to-8
Decoder
D0D1D2D3D4D5D6D7
A0A1A2
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Introduction & Construction of DecodersConstruction of 3Construction of 3--toto--88 OROR 33--lineline--toto--88--line (or 1line (or 1--ofof--8)8)
decoderdecoder (using two 2(using two 2--toto--4 decoders) and Enable Input4 decoders) and Enable Input
3-to-8
Decoder
D0D1D2D3D4
D5D6D7
A0A1
A2
2-to-4
Decoder
2-to-4
Decoder
D0D1
D2D3
A0
A1
A0A1
A2
E
D4D5D6D7E
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Introduction & Construction of Decoders
FIGURE: Truth Table and Logic circuit for an IC Based 33--toto--88 OROR33--lineline--toto--88--line (or 1line (or 1--ofof--8) decoder8) decoder more then one enable inputs
Some decoders have one or
more ENABLE inputs usedto control the operation of
the decoder.
IC 74LS138 internal diagram of 3IC 74LS138 internal diagram of 3--toto--88 OROR 33--lineline--toto--88--lineline
(or 1(or 1--ofof--8) decoder8) decoder with multiple Enable Inputswith multiple Enable Inputs
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Introduction & Construction of Decoders
FIGURE: Block diagram, Truth
Table and Internal Logic circuit
for an IC 7442 of44--toto--1010 OROR44--lineline--toto--1010--line (or 1line (or 1--ofof--10)10)
decoderdecoder with inverted outputs.
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Introduction & Construction of DecodersBCD-TO-7-Segment Decoder/Drivers
FIGURE: (a) 7-segmentarrangement; (b) active
segments for each digit.
FIGURE: (a) BCD-to-7-segment
decoder/driver driving a
common-anode 7-segment LED
display; (b) segment patterns for
all possible input codes.
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Introduction & Construction of Decoders
FIGURE: Logic Diagram of BCD TO SEVEN-SEGMENT Decoder Circuit
abcdefg
ABCD
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